Real-time SDR system with TySOM

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Artykuł na portalu Aldec

Bartosz_Piotr_Tomasz

Bartosz, Piotr and Tomasz work as electronics engineers at Aldec in the field of Hardware Description Language verification. They started as interns during their summer break in 2021, where they gained necessary experience while using knowledge gained from college. Working as a team, they proved their skills with Verilog and VHDL languages as well as their ability to work with SoC FPGAs. They are all students at the AGH University of Science and Technology in Krakow, Poland where they received their BSc in Electronics qualifications and all three are currently working on Masters degrees in Electronics and Telecommunications.